1. Field of the Invention
The present invention relates to a method of forming a device isolation layer of a semiconductor device, and more particularly, to a method of forming a device isolation layer of a semiconductor device with a recessed device isolation layer.
2. Background of the Related Art
In a semiconductor device, the isolation layer of unit elements greatly affects the operation of the unit elements and the packing density of an integrated circuit. A thick oxide layer is formed as a device isolation layer for isolating the unit elements of a semiconductor integrated circuit by a selective oxidation, such as LOCOS (Local Oxidation of Silicon).
However, a bird's beak may be formed during the formation of the device isolation layer such that the size of an active region, where the device is to be formed, is reduced, and thus, there is difficulty in achieving a high-density integration of semiconductor elements. For this reason, other methods of forming a device isolation layer have been suggested so as to reduce the bird's beak or to prevent the formation of the bird's beak.
U.S. Pat. No. 4,272,308 discloses a method of forming a device isolation layer with reduced bird's beak. In the method, a buffer oxide layer and a first nitride layer are formed on a silicon substrate. An active region is defined by exposing a predetermined part of the silicon substrate through a photolithographic method. After depositing a second nitride layer on the whole surface of the above structure, the second nitride layer is removed by means of a reactive ion etching (RIE), other than its regions which are deposited on the upper part and the side parts of the first nitride layer so as to expose the silicon substrate. A device isolation layer is formed on such exposed silicon substrate by a thermal oxidation process.
However, the silicon substrate comes into contact with the second nitride layer, which is used as the side wall in the above-described method, such that there is a deterioration of the electrical characteristics of the device, caused by stress during the thermal oxidation. Additionally, a large step height between the upper part of the device isolation layer and the active region of the silicon substrate is disadvantageous.
U.S. Pat. No. 4,292,156 discloses another method of forming a device isolation layer. In this method, an oxide layer is formed on a silicon substrate, and then an active region is defined by removing the oxide layer to a predetermined width of the silicon substrate by a photolithographic process. After forming a side wall of silicon nitride on the exposed side parts of the oxide layer and the silicon substrate, a device isolation layer is formed on the exposed silicon substrate by thermal oxidation.
The above method is disadvantageous, because the silicon substrate within the active region, which is covered with the oxide layer, is subject to oxidation during the thermal oxidation to form the device isolation layer. Further, the silicon substrate is in contact with the side parts and bottom of the nitride layer, resulting in the deterioration of the electrical characteristics in the device, caused by the distortion at the edge of the device isolation layer and the stress on the substrate during the thermal oxidation. Moreover, the threshold voltage of the device is changed.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.